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A successive-approximation ADC is a type of analog-to-digital converter that converts a continuous analog waveform into a discrete digital representation using a binary search through all possible quantization levels before finally converging upon a digital output for each conversion. Contents 1 Algorithm 1.1 Variants This paper presents a charge redistribution successive approximation A/D-Converter with 14 bit resolution designed in a 0.35 µm CMOS technology. An enhanced self-calibration technique is applied Successive-approximation resistor and control logic. Vin. Vref 1 1 VFS+ VFS 2 4. 1 1 1 VFS+ VFS + VFS 2 8 16. 1 1 VFS+ VFS 2 8. 1 V 2 FS. CMPin b1=1 V0. b1=1 b2=0. b1= b3= 1 b1= b3= b4= 1 b2=0 b2=0 Charge-redistribution ADC Charge-redistribution ADC draws attention as a suitable ADC in the nanometer CMOS An improved binary-weighted, switched-capacitor, charge-redistribution successive approximation analog-to-digital converter (ADC) characterized in that it includes an adjusting mechanism for adding a charge corresponding to one-half of the least significant bit (LSB) of said ADC to the charge stored in the switched capacitor array after the sampling phase of said ADC so as to provide a The base ADC cell is implemented using a successive approximation charge redistribution architecture. The choice of architecture and circuit design are presented. The base ADC has been implemented in 0.13 m CMOS as a 100 kS/s SAR ADC whose resolution can be varied from 3 to 8 bits with corresponding power consumption of 0.23 W to 0.90 W.. US9859912B2 - Charge-redistribution successive approximation ADC and control method thereof - Google Patents Charge-redistribution successive approximation ADC and control method thereof Download PDF Info Publication number US9859912B2. US9859912B2